I, Ashwin Muruganandam, graduated with a major in Computer Engineering from the University of Victoria's Faculty of Engineering and Computer Science.

My work experience has spanned a variety of fields, such as, customer-facing IT positions, process control and automation for hydro and oil plant equipment, and as a electrical CAD designer for buildings related projects.

My interests lie in programming microcontrollers and tinkering with FPGA hardware to gain more experience in the field. Given my experiences in numerous areas, I have the following information to highlight:

Languages: Verilog, VHDL, C/C++, Python, MATLAB, HTML, and CSS.

Hardware: PLC, HMI, FPGA, Oscilloscope, Microcontrollers, General Electrical Equipment

Software: Wireshark, Solidworks, KiCAD, Vivado, iCEcube2, Unity Pro XL, RSLogix, Revit

Miscellaneous: GitHub

Skills: Demonstrated ability to conduct thorough and valuable research, strong work ethic, and excellent team collaboration skills. Proficient in programming microcontrollers and eager to further develop expertise in FPGA design verification and RTL synthesis. Adept at problem-solving and quickly adapting to new technologies and methodologies.

Awards and Certifications:

1. University of Victoria President's Scholarship (Academic)
2. Jarmila Vlasta Von Drak Thouvenelle Scholarship (Academic)
3. British Columbia Class 5 Driver's License